Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Tue, 6 Apr 2021 09:29:03 +0200 | Subject | Re: [PATCH] m68k: mvme147, mvme16x: Don't wipe PCC timer config bits |
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On Tue, Mar 30, 2021 at 9:40 AM Finn Thain <fthain@telegraphics.com.au> wrote: > Don't clear the timer 1 configuration bits when clearing the interrupt flag > and counter overflow. As Michael reported, "This results in no timer > interrupts being delivered after the first. Initialization then hangs > in calibrate_delay as the jiffies counter is not updated." > > On mvme16x, enable the timer after requesting the irq, consistent with > mvme147. > > Cc: Michael Pavone <pavone@retrodev.com> > Fixes: 7529b90d051e ("m68k: mvme147: Handle timer counter overflow") > Fixes: 19999a8b8782 ("m68k: mvme16x: Handle timer counter overflow") > Reported-and-tested-by: Michael Pavone <pavone@retrodev.com> > Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Thanks, applying, and queueing in the m68k for-v5.13 branch.
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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