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SubjectRe: [PATCH v8] RISC-V: enable XIP
On Tue, Apr 13, 2021 at 02:35:14AM -0400, Alexandre Ghiti wrote:
> From: Vitaly Wool <vitaly.wool@konsulko.com>
>
> Introduce XIP (eXecute In Place) support for RISC-V platforms.
> It allows code to be executed directly from non-volatile storage
> directly addressable by the CPU, such as QSPI NOR flash which can
> be found on many RISC-V platforms. This makes way for significant
> optimization of RAM footprint. The XIP kernel is not compressed
> since it has to run directly from flash, so it will occupy more
> space on the non-volatile storage. The physical flash address used
> to link the kernel object files and for storing it has to be known
> at compile time and is represented by a Kconfig option.
>
> XIP on RISC-V will for the time being only work on MMU-enabled
> kernels.
>
> Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> [ Rebase on top of "Move
> kernel mapping outside the linear mapping" ]
> Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
> Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>

In next-20210426, when building riscv:allnoconfig or riscv:tinyconfig:

arch/riscv/kernel/setup.c: In function 'setup_arch':
arch/riscv/kernel/setup.c:284:32: error: implicit declaration of function 'XIP_FIXUP'

Guenter

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