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    Subject[PATCH 18/43] KVM: x86: Consolidate APIC base RESET initialization code
    From
    Consolidate the APIC base RESET logic, which is currently spread out
    across both x86 and vendor code. For an in-kernel APIC, the vendor code
    is redundant. But for a userspace APIC, KVM relies on the vendor code
    to initialize vcpu->arch.apic_base. Hoist the vcpu->arch.apic_base
    initialization above the !apic check so that it applies to both flavors
    of APIC emulation, and delete the vendor code.

    Signed-off-by: Sean Christopherson <seanjc@google.com>
    ---
    arch/x86/kvm/lapic.c | 14 ++++++++------
    arch/x86/kvm/svm/svm.c | 6 ------
    arch/x86/kvm/vmx/vmx.c | 7 -------
    3 files changed, 8 insertions(+), 19 deletions(-)

    diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
    index b1366df46d1d..07cfa4d181da 100644
    --- a/arch/x86/kvm/lapic.c
    +++ b/arch/x86/kvm/lapic.c
    @@ -2307,18 +2307,20 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)
    struct kvm_lapic *apic = vcpu->arch.apic;
    int i;

    - if (!apic)
    - return;
    -
    - /* Stop the timer in case it's a reset to an active apic */
    - hrtimer_cancel(&apic->lapic_timer.timer);
    -
    if (!init_event) {
    vcpu->arch.apic_base = APIC_DEFAULT_PHYS_BASE |
    MSR_IA32_APICBASE_ENABLE;
    if (kvm_vcpu_is_reset_bsp(vcpu))
    vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP;
    + }

    + if (!apic)
    + return;
    +
    + /* Stop the timer in case it's a reset to an active apic */
    + hrtimer_cancel(&apic->lapic_timer.timer);
    +
    + if (!init_event) {
    apic->base_address = MSR_IA32_APICBASE_ENABLE;

    kvm_apic_set_xapic_id(apic, vcpu->vcpu_id);
    diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
    index 6c73ea3d20c6..271b6def087f 100644
    --- a/arch/x86/kvm/svm/svm.c
    +++ b/arch/x86/kvm/svm/svm.c
    @@ -1289,12 +1289,6 @@ static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
    svm->spec_ctrl = 0;
    svm->virt_spec_ctrl = 0;

    - if (!init_event) {
    - vcpu->arch.apic_base = APIC_DEFAULT_PHYS_BASE |
    - MSR_IA32_APICBASE_ENABLE;
    - if (kvm_vcpu_is_reset_bsp(vcpu))
    - vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP;
    - }
    init_vmcb(vcpu);

    /*
    diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
    index fa14e9a74b96..40a4ac23d54f 100644
    --- a/arch/x86/kvm/vmx/vmx.c
    +++ b/arch/x86/kvm/vmx/vmx.c
    @@ -4509,13 +4509,6 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
    vmx->hv_deadline_tsc = -1;
    kvm_set_cr8(vcpu, 0);

    - if (!init_event) {
    - vcpu->arch.apic_base = APIC_DEFAULT_PHYS_BASE |
    - MSR_IA32_APICBASE_ENABLE;
    - if (kvm_vcpu_is_reset_bsp(vcpu))
    - vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP;
    - }
    -
    vmx_segment_cache_clear(vmx);

    seg_setup(VCPU_SREG_CS);
    --
    2.31.1.498.g6c1eba8ee3d-goog
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