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SubjectRe: [PATCH RESEND 2/2] perf/x86/lbr: Move cpuc->lbr_xsave allocation out of sleeping region
On Wed, Apr 21, 2021 at 04:48:36PM +0800, Like Xu wrote:
> Hi Peter,
>
> On 2021/4/21 16:38, Peter Zijlstra wrote:
> > On Wed, Apr 21, 2021 at 10:18:25AM +0800, Like Xu wrote:
> > > -int x86_reserve_hardware(void)
> > > +int x86_reserve_hardware(struct perf_event *event)
> > > {
> > > int err = 0;
> > > @@ -398,8 +398,10 @@ int x86_reserve_hardware(void)
> > > if (atomic_read(&pmc_refcount) == 0) {
> > > if (!reserve_pmc_hardware())
> > > err = -EBUSY;
> > > - else
> > > + else {
> > > reserve_ds_buffers();
> > > + reserve_lbr_buffers(event);
> > > + }
> > > }
> > > if (!err)
> > > atomic_inc(&pmc_refcount);
> > > @@ -650,7 +652,7 @@ static int __x86_pmu_event_init(struct perf_event *event)
> > > if (!x86_pmu_initialized())
> > > return -ENODEV;
> > > - err = x86_reserve_hardware();
> > > + err = x86_reserve_hardware(event);
> > > if (err)
> > > return err;
> >
> > This is still complete garbage..
>
> Hhh,thanks for your comment!

The nice one was here:

https://lkml.kernel.org/r/20210323214140.GE4746@worktop.programming.kicks-ass.net

> So do we have a better idea to alloc cpuc->lbr_xsave
> to avoid this kind of call trace ?

You thinking this is actually hard scares me. Frob something in
intel_pmu_hw_config() or thereabouts.

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