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SubjectRe: [PATCH v2] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC
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On 08/03/2021 20:07, Dinh Nguyen wrote:
> Hi Krzysztof,
>
> On 3/8/21 11:48 AM, Krzysztof Kozlowski wrote:
>> From: Krzysztof Kozlowski <krzk@kernel.org>
>>
>> Enable in defconfig two Intel ARM64 architectures: the eASIC N5X SoCFPGA
>> and Keem Bay SoC. This allows compile coverage when building default
>> config.
>>
>> For the N5X (and Agilex) enable also DesignWare SPI controller in MMIO.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>>
>> ---
>>
>> Hi Arnd,
>>
>> You asked me to check if all drivers are enabled for these platforms.
>> In general the answer is yes. In particular:
>> 1. Keem Bay is does not have much in upstream, but everything described
>> in DTS is there,
>> 2. N5X shares a lot with Agilex SoCFPGA which already (mostly) is
>> supported.
>>
>> Changes since v1:
>> 1. Enable also SPI_DW_MMIO
>> ---
>> arch/arm64/configs/defconfig | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
>> index d612f633b771..9f9adcb8b0e9 100644
>> --- a/arch/arm64/configs/defconfig
>> +++ b/arch/arm64/configs/defconfig
>> @@ -29,6 +29,7 @@ CONFIG_KALLSYMS_ALL=y
>> CONFIG_PROFILING=y
>> CONFIG_ARCH_ACTIONS=y
>> CONFIG_ARCH_AGILEX=y
>> +CONFIG_ARCH_N5X=y
>
> I just submitted a patch for this as well. From the looks of the
> defconfig file, it looks like the platforms are in alphabetical order,
> but then I see that ARCH_SUNXI is not in it's correct spot if there is a
> rule for keeping things in alphabetical order.
>

The rule is that order comes from savedefconfig, not alphabetical. This
way you avoid reshuffling of symbols on any future savedefconfig.

Best regards,
Krzysztof

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