Messages in this thread | | | From | Linus Walleij <> | Date | Wed, 3 Mar 2021 16:18:32 +0100 | Subject | Re: [PATCH v4] ARM: Implement SLS mitigation |
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On Tue, Feb 23, 2021 at 11:05 AM Will Deacon <will@kernel.org> wrote: > On Mon, Feb 22, 2021 at 01:50:06PM -0800, Jian Cai wrote: > > I am not sure if there are any plans to protect assembly code and I > > will leave it to the Arm folks since they know a whole lot better. But > > even without that part, we should still have better protection, > > especially when overhead does not look too bad: I did some preliminary > > experiments on ChromeOS, code size of vmlinux increased 3%, and there > > were no noticeable changes to run-time performance of the benchmarks I > > used. > > If the mitigation is required, I'm not sure I see a lot of point in only > doing a half-baked job of it. It feels a bit like a box-ticking exercise, > in which case any overhead is too much.
I wrote some suggestions on follow-ups in my reply, and I can help out doing some of the patches, I think.
Since ARM32 RET is mov pc, <> git grep 'mov.*pc,' | wc -l gives 93 sites in arch/arm. I suppose these need to come out:
mov pc, lr dsb(nsh); isb();
As ARM32 doesn't have sb my idea is to make a macro "sb" that resolves to dsb/isb when this is enabled and then we could start patching all the assembly users with that as well. I need the Kconfig symbol from this patch though.
I also suggest selecting this mitigation as part of HARDEN_BRANCH_PREDICTOR, by the token that either you want all of them or none of them.
Yours, Linus Walleij
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