Messages in this thread | | | Subject | Re: [PATCH v3 0/5] Reset driver for IMX8MQ VPU hardware block | From | Philipp Zabel <> | Date | Wed, 03 Mar 2021 15:17:53 +0100 |
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Hi Benjamin,
On Mon, 2021-03-01 at 16:17 +0100, Benjamin Gaignard wrote: > The two VPUs inside IMX8MQ share the same control block which can be see > as a reset hardware block.
This isn't a reset controller though. The control block also contains clock gates of some sort and a filter register for the featureset fuses. Those shouldn't be manipulated via the reset API.
> In order to be able to add the second VPU (for HECV decoding) it will be > more handy if the both VPU drivers instance don't have to share the > control block registers. This lead to implement it as an independ reset > driver and to change the VPU driver to use it.
Why not switch to a syscon regmap for the control block? That should also allow to keep backwards compatibility with the old binding with minimal effort.
> Please note that this series break the compatibility between the DTB and > kernel. This break is limited to IMX8MQ SoC and is done when the driver > is still in staging directory.
I know in this case we are pretty sure there are no users of this binding except for a staging driver, but it would still be nice to keep support for the deprecated binding, to avoid the requirement of updating kernel and DT in lock-step.
regards Philipp
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