Messages in this thread | | | Date | Mon, 15 Mar 2021 18:37:46 +0100 | From | Jiri Olsa <> | Subject | Re: [PATCH v2 11/27] perf parse-events: Support hardware events inside PMU |
| |
On Mon, Mar 15, 2021 at 10:28:12AM +0800, Jin, Yao wrote: > Hi Jiri, > > On 3/13/2021 3:15 AM, Jiri Olsa wrote: > > On Thu, Mar 11, 2021 at 03:07:26PM +0800, Jin Yao wrote: > > > On hybrid platform, some hardware events are only available > > > on a specific pmu. For example, 'L1-dcache-load-misses' is only > > > available on 'cpu_core' pmu. And even for the event which can be > > > available on both pmus, the user also may want to just enable > > > one event. So now following syntax is supported: > > > > > > cpu_core/<hardware event>/ > > > cpu_core/<hardware cache event>/ > > > cpu_core/<pmu event>/ > > > > > > cpu_atom/<hardware event>/ > > > cpu_atom/<hardware cache event>/ > > > cpu_atom/<pmu event>/ > > > > > > It limits the event to be enabled only on a specified pmu. > > > > > > The patch uses this idea, for example, if we use "cpu_core/LLC-loads/", > > > in parse_events_add_pmu(), term->config is "LLC-loads". > > > > hum, I don't understand how this doest not work even now, > > I assume both cpu_core and cpu_atom have sysfs device directory > > with events/ directory right? > > > > Yes, we have cpu_core and cpu_atom directories with events. > > root@ssp-pwrt-002:/sys/devices/cpu_atom/events# ls > branch-instructions bus-cycles cache-references instructions > mem-stores topdown-bad-spec topdown-fe-bound > branch-misses cache-misses cpu-cycles mem-loads > ref-cycles topdown-be-bound topdown-retiring > > root@ssp-pwrt-002:/sys/devices/cpu_core/events# ls > branch-instructions cache-misses instructions mem-stores > topdown-bad-spec topdown-fe-bound topdown-mem-bound > branch-misses cache-references mem-loads ref-cycles > topdown-be-bound topdown-fetch-lat topdown-retiring > bus-cycles cpu-cycles mem-loads-aux slots > topdown-br-mispredict topdown-heavy-ops > > > and whatever is defined in events we allow in parsing syntax.. > > > > why can't we treat them like 2 separated pmus? > > > > But if without this patch, it reports the error, > > root@ssp-pwrt-002:~# ./perf stat -e cpu_core/cycles/ -a -vv -- sleep 1 > event syntax error: 'cpu_core/cycles/' > \___ unknown term 'cycles' for pmu 'cpu_core'
yep, because there's special care for 'cycles' unfortunately, but you should be able to run 'cpu_core/cpu-cycles/' right?
> > valid terms: event,pc,edge,offcore_rsp,ldlat,inv,umask,frontend,cmask,config,config1,config2,name,period,percore > > Initial error: > event syntax error: 'cpu_core/cycles/' > \___ unknown term 'cycles' for pmu 'cpu_core' > > valid terms: event,pc,edge,offcore_rsp,ldlat,inv,umask,frontend,cmask,config,config1,config2,name,period,percore > Run 'perf list' for a list of valid events > > The 'cycles' is treated as a unknown term, then it errors out.
yep, because it's not in events.. we could add special rule to treat cycles as cpu-cycles inside pmu definition ;-)
jirka
| |