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SubjectRe: [PATCH v8 3/4] arm64: dts: mediatek: add mt6765 support
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On Wed, 2021-03-10 at 00:08 +0800, Chun-Kuang Hu wrote:
> Hi, Macpaul:
>
> Macpaul Lin <macpaul.lin@mediatek.com> 於 2020年2月21日 週五 下午6:22寫道:
> >
> > From: Mars Cheng <mars.cheng@mediatek.com>
> >
> > Add basic chip support for Mediatek 6765, include
> > uart node with correct uart clocks, pwrap device
> >
> > Add clock controller nodes, include topckgen, infracfg,
> > apmixedsys and subsystem.
> >
> > Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> > Signed-off-by: Owen Chen <owen.chen@mediatek.com>
> > Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> > Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> > ---
> > arch/arm64/boot/dts/mediatek/Makefile | 1 +
> > arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33 ++++
> > arch/arm64/boot/dts/mediatek/mt6765.dtsi | 253 +++++++++++++++++++++++++++
> > 3 files changed, 287 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi

[deleted]

> > +
> > + mmsys_config: syscon@14000000 {
> > + compatible = "mediatek,mt6765-mmsys", "syscon";
> > + reg = <0 0x14000000 0 0x1000>;
> > + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_LOW>;
>
> I does not see interrupts property in binding document [1], please add
> this in binding document first.
> I'm curious about this interrupt. In which condition would it be triggered?
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt?h=v5.12-rc2
>
> Regards,
> Chun-Kuang.

Thanks for reminding.
I'll remove interrupts binding in next version and leave it for mmsys
driver owner to update when the configuration of mmsys driver is
enabled.

[...]


> > + smi_common: smi_common@14002000 {
> > + compatible = "mediatek,mt6765-smi-common", "syscon";
> > + reg = <0 0x14002000 0 0x1000>;
> > + };
> > +

@Yong Wu
Thanks for reviewing here, I'll replace smi_common@14002000 to
smi@14002000

Regards,
Macpaul Lin
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