Messages in this thread | | | From | Daniel Palmer <> | Date | Wed, 10 Mar 2021 19:20:27 +0900 | Subject | Re: [PATCH v2] irqchip/irq-mst: Support polarity configuration |
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Hi Mark-PK,
On Mon, 8 Mar 2021 at 23:30, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote: > From: Daniel Palmer <daniel@0x0f.com> > >On Mon, 8 Mar 2021 at 15:05, Mark-PK Tsai <mark-pk.tsai@mediatek.com> wrote: > >> +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type) > > > +{ > >> + if (type != IRQ_TYPE_LEVEL_LOW && type != IRQ_TYPE_LEVEL_HIGH) > >> + return -EINVAL; > >> + > > > >Does this mean we can't do rising or falling edge interrupts? > > Yes, the interrupt of mst-intc is either level high or level low. > Actually the input signal can be pulse, but it will be converted to level > by the latch in mst-intc.
Are the GPIO connected interrupts meant to be configured as level interrupts then? For the MStar MSC313(e) there are 4 (that I know of) GPIO lines that are wired into the mst-intc that requires EOI. Until this patch with those lines configured as a rising edge a single interrupt came each time the GPIO was pulled up as far as I remember.
I'm probably misunderstanding but a level interrupt doesn't seem to make sense for a GPIO as it can't be serviced to clear the interrupt.
Thanks,
Daniel
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