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SubjectRe: [PATCH v22 8/8] x86/vdso: Add ENDBR64 to __vdso_sgx_enter_enclave
On Wed, Mar 10, 2021 at 02:05:19PM -0800, Yu-cheng Yu wrote:
> When CET is enabled, __vdso_sgx_enter_enclave() needs an endbr64
> in the beginning of the function.

OK.

What you should do is to explain what it does and why it's needed.

>
> Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: Jarkko Sakkinen <jarkko@kernel.org>
> ---
> arch/x86/entry/vdso/vsgx.S | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/x86/entry/vdso/vsgx.S b/arch/x86/entry/vdso/vsgx.S
> index 86a0e94f68df..a70d4d09f713 100644
> --- a/arch/x86/entry/vdso/vsgx.S
> +++ b/arch/x86/entry/vdso/vsgx.S
> @@ -27,6 +27,9 @@
> SYM_FUNC_START(__vdso_sgx_enter_enclave)
> /* Prolog */
> .cfi_startproc
> +#ifdef CONFIG_X86_CET
> + endbr64
> +#endif
> push %rbp
> .cfi_adjust_cfa_offset 8
> .cfi_rel_offset %rbp, 0
> --
> 2.21.0
>
>

/Jarkko

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