Messages in this thread Patch in this message | | | Subject | Re: [PATCH v4 17/19] coresight: core: Add support for dedicated percpu sinks | From | Suzuki K Poulose <> | Date | Mon, 1 Mar 2021 13:54:54 +0000 |
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On 2/26/21 6:34 AM, kernel test robot wrote: > Hi Suzuki, > > Thank you for the patch! Yet something to improve: > > [auto build test ERROR on linus/master] > [also build test ERROR on next-20210226] > [cannot apply to kvmarm/next arm64/for-next/core tip/perf/core v5.11] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in > https://git-scm.com/docs/git-format-patch] > > url: https://github.com/0day-ci/linux/commits/Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447 > base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 6fbd6cf85a3be127454a1ad58525a3adcf8612ab > config: arm-randconfig-r024-20210225 (attached as .config) > compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project a921aaf789912d981cbb2036bdc91ad7289e1523) > reproduce (this is a W=1 build): > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # install arm cross compiling tool for clang build > # apt-get install binutils-arm-linux-gnueabi > # https://github.com/0day-ci/linux/commit/c37564326cdf11e0839eae06c1bfead47d3e5775 > git remote add linux-review https://github.com/0day-ci/linux > git fetch --no-tags linux-review Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447 > git checkout c37564326cdf11e0839eae06c1bfead47d3e5775 > # save the attached .config to linux build tree > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot <lkp@intel.com>
Thanks for the report. The following fixup should clear this :
---8>---
diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 8a3a3c199087..85008a65e21f 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -429,6 +429,33 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o csa->write(val, offset, false, true); }
+#else /* !CONFIG_64BIT */ + +static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, + u32 offset) +{ + WARN_ON(1); + return 0; +} + +static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset) +{ + WARN_ON(1); + return 0; +} + +static inline void csdev_access_relaxed_write64(struct csdev_access *csa, + u64 val, u32 offset) +{ + WARN_ON(1); +} + +static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset) +{ + WARN_ON(1); +} +#endif /* CONFIG_64BIT */ + static inline bool coresight_is_percpu_source(struct coresight_device *csdev) { return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && @@ -440,32 +467,6 @@ static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM); } -#else /* !CONFIG_64BIT */ - -static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, - u32 offset) -{ - WARN_ON(1); - return 0; -} - -static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset) -{ - WARN_ON(1); - return 0; -} - -static inline void csdev_access_relaxed_write64(struct csdev_access *csa, - u64 val, u32 offset) -{ - WARN_ON(1); -} - -static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset) -{ - WARN_ON(1); -} -#endif /* CONFIG_64BIT */
extern struct coresight_device * coresight_register(struct coresight_desc *desc);
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