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    Subject[PATCH 5.11 497/775] drm/msm: Fix races managing the OOB state for timestamp vs timestamps.
    Date
    From: Eric Anholt <eric@anholt.net>

    [ Upstream commit 5f98b33b04c02c0d9088c7486c59d058696782f9 ]

    Now that we're not racing with GPU setup, also fix races of timestamps
    against other timestamps. In freedreno CI, we were seeing this path trigger
    timeouts on setting the GMU bit, producing:

    [drm:_a6xx_gmu_set_oob] *ERROR* Timeout waiting for GMU OOB set GPU_SET: 0x0

    and this triggered especially on the first set of tests right after
    boot (it's probably easier to lose the race than one might think,
    given that we start many tests in parallel, and waiting for NFS to
    page in code probably means that lots of tests hit the same point of
    screen init at the same time). As of this patch, the message seems to
    have completely gone away.

    Signed-off-by: Eric Anholt <eric@anholt.net>
    Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support")
    Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
    Signed-off-by: Rob Clark <robdclark@chromium.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++++
    1 file changed, 4 insertions(+)

    diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
    index 2dc6b342cf9b5..0366419d8bfed 100644
    --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
    +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
    @@ -1169,6 +1169,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
    {
    struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
    struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
    + static DEFINE_MUTEX(perfcounter_oob);
    +
    + mutex_lock(&perfcounter_oob);

    /* Force the GPU power on so we can read this register */
    a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET);
    @@ -1177,6 +1180,7 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
    REG_A6XX_RBBM_PERFCTR_CP_0_HI);

    a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET);
    + mutex_unlock(&perfcounter_oob);
    return 0;
    }

    --
    2.27.0


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