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    Subject[PATCH 5.11 505/775] coresight: etm4x: Skip accessing TRCPDCR in save/restore
    Date
    From: Suzuki K Poulose <suzuki.poulose@arm.com>

    [ Upstream commit df81b43802f43c0954a55e5d513e8750a1ab4d31 ]

    When the ETM is affected by Qualcomm errata, modifying the
    TRCPDCR could cause the system hang. Even though this is
    taken care of during enable/disable ETM, the ETM state
    save/restore could still access the TRCPDCR. Make sure
    we skip the access during the save/restore.

    Found by code inspection.

    Link: https://lore.kernel.org/r/20210110224850.1880240-3-suzuki.poulose@arm.com
    Fixes: 02510a5aa78d ("coresight: etm4x: Add support to skip trace unit power up")
    Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
    Cc: Mike Leach <mike.leach@linaro.org>
    Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
    Cc: Tingwei Zhang <tingwei@codeaurora.org>
    Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
    Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
    Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
    Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
    Link: https://lore.kernel.org/r/20210201181351.1475223-5-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/hwtracing/coresight/coresight-etm4x-core.c | 12 +++++++-----
    1 file changed, 7 insertions(+), 5 deletions(-)

    diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
    index b20b6ff17cf65..200fa1c8aa0be 100644
    --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
    +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
    @@ -1355,7 +1355,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)

    state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR);

    - state->trcpdcr = readl(drvdata->base + TRCPDCR);
    + if (!drvdata->skip_power_up)
    + state->trcpdcr = readl(drvdata->base + TRCPDCR);

    /* wait for TRCSTATR.IDLE to go up */
    if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) {
    @@ -1373,9 +1374,9 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
    * potentially save power on systems that respect the TRCPDCR_PU
    * despite requesting software to save/restore state.
    */
    - writel_relaxed((state->trcpdcr & ~TRCPDCR_PU),
    - drvdata->base + TRCPDCR);
    -
    + if (!drvdata->skip_power_up)
    + writel_relaxed((state->trcpdcr & ~TRCPDCR_PU),
    + drvdata->base + TRCPDCR);
    out:
    CS_LOCK(drvdata->base);
    return ret;
    @@ -1469,7 +1470,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)

    writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET);

    - writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR);
    + if (!drvdata->skip_power_up)
    + writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR);

    drvdata->state_needs_restore = false;

    --
    2.27.0


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