Messages in this thread Patch in this message |  | | From | Michael Walle <> | Subject | [PATCH net-next 6/9] net: phy: icplus: don't set APS_EN bit on IP101G | Date | Tue, 9 Feb 2021 17:40:48 +0100 |
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This bit is reserved as 'always-write-1'. While this is not a particular error, because we are only setting it, guard it by checking the model to prevent errors in the future.
Signed-off-by: Michael Walle <michael@walle.cc> --- drivers/net/phy/icplus.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c index 189a9a34ed5f..a6e1c7611f15 100644 --- a/drivers/net/phy/icplus.c +++ b/drivers/net/phy/icplus.c @@ -250,7 +250,7 @@ static int ip101a_g_probe(struct phy_device *phydev) static int ip101a_g_config_init(struct phy_device *phydev) { struct ip101a_g_phy_priv *priv = phydev->priv; - int err, c; + int err; /* configure the RXER/INTR_32 pin of the 32-pin IP101GR if needed: */ switch (priv->sel_intr32) { @@ -280,11 +280,16 @@ static int ip101a_g_config_init(struct phy_device *phydev) break; } - /* Enable Auto Power Saving mode */ - c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); - c |= IP101A_G_APS_ON; + /* Enable Auto Power Saving mode on IP101A, on IP101G this bit is + * reserved as 'write-one'. + */ + if (priv->model == IP101A) { + err = phy_set_bits(phydev, IP10XX_SPEC_CTRL_STATUS, IP101A_G_APS_ON); + if (err) + return err; + } - return phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c); + return 0; } static int ip101a_g_ack_interrupt(struct phy_device *phydev) -- 2.20.1
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