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Subject[PATCH RFC 0/7] Introduce support for guest AMX feature
Intel introduces Advanced Matrix Extensions (AMX) [1] feature that
will be shipping soon. AMX consists of configurable two-dimensional
"TILE" registers and new accelerator instructions that operate on them.
TMUL (Tile matrix MULtiply) is the first accelerator instruction set
to use the new registers.

Intel AMX is XSAVE supported and XSAVE enabled. It is associated with
two state components, XTILECFG and XTILEDATA. The XTILEDATA state
component is very large so an XSAVE extension called extended feature
disable (XFD) is introduced to support dynamic usage. When XFD is
enabled for a state component, any instruction that would access
that state component does not execute and instead generates an #NM.
So Linux kernel arms XFD to monitor the first usage of AMX.

This patchset adds AMX and XFD support for guest: providing related
CPUID and MSRs to guest, adding extended XSAVE state context switch and
XFD MSRs switch during vmenter/vmexit.

This RFC series is based on kernel AMX series v3 [2] in LKML though not
latest upstream commit and we'd looking forward for your comments.

[1]: Intel Architecture Instruction Set Extension Programming Reference

[2]: AMX kernel series v3

Jing Liu (7):
kvm: x86: Expose XFD CPUID to guest
kvm: x86: Introduce XFD MSRs as passthrough to guest
kvm: x86: Dynamic XSAVE and XFD MSRs context switch
kvm: x86: Add new ioctls for XSAVE extension
kvm: x86: Revise CPUID.D.1.EBX for alignment rule
kvm: x86: Add AMX_TILE, AMX_INT8 and AMX_BF16 support
kvm: x86: AMX XCR0 support for guest

arch/x86/include/asm/kvm_host.h | 3 +
arch/x86/include/uapi/asm/kvm.h | 5 ++
arch/x86/kernel/fpu/init.c | 1 +
arch/x86/kernel/fpu/xstate.c | 2 +
arch/x86/kvm/cpuid.c | 19 +++-
arch/x86/kvm/vmx/vmx.c | 114 ++++++++++++++++++++++++
arch/x86/kvm/vmx/vmx.h | 7 +-
arch/x86/kvm/x86.c | 153 ++++++++++++++++++++++++++------
include/uapi/linux/kvm.h | 8 ++
9 files changed, 279 insertions(+), 33 deletions(-)


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