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SubjectRe: [PATCH v4 4/5] ASoC: Intel: Add DMI quirk table to soc_intel_is_byt_cr()
On Wed, 20 Jan 2021, Hans de Goede wrote:

> Some Bay Trail systems:
> 1. Use a non CR version of the Bay Trail SoC
> 2. Contain at least 6 interrupt resources so that the
> platform_get_resource(pdev, IORESOURCE_IRQ, 5) check to workaround
> non CR systems which list their IPC IRQ at index 0 despite being
> non CR does not work
> 3. Despite 1. and 2. still have their IPC IRQ at index 0 rather then 5
>
> Add a DMI quirk table to check for the few known models with this issue,
> so that the right IPC IRQ index is used on these systems.
>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> sound/soc/intel/common/soc-intel-quirks.h | 25 +++++++++++++++++++++++
> 1 file changed, 25 insertions(+)

Applied, thanks.

--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
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