Messages in this thread |  | | From | Hector Martin <> | Subject | Re: [PATCH 7/8 v1.5] arm64: Always keep DAIF.[IF] in sync | Date | Tue, 23 Feb 2021 02:39:11 +0900 |
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On 20/02/2021 03.26, Mark Rutland wrote: > On Sat, Feb 20, 2021 at 02:25:30AM +0900, Hector Martin wrote: >> Apple SoCs (A11 and newer) have some interrupt sources hardwired to the >> FIQ line. We implement support for this by simply treating IRQs and FIQs >> the same way in the interrupt vectors. >> >> To support these systems, the FIQ mask bit needs to be kept in sync with >> the IRQ mask bit, so both kinds of exceptions are masked together. No >> other platforms should be delivering FIQ exceptions right now, and we >> already unmask FIQ in normal process context, so this should not have an >> effect on other systems - if spurious FIQs were arriving, they would >> already panic the kernel. > > This looks good to me; I've picked this up and pushed out my arm64/fiq > branch [1,2] incorporating this, tagged as arm64-fiq-20210219. > > I'll give this version a few days to gather comments before I post a v2. > > [1] git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git arm64/fiq > [2] https://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git/log/?h=arm64/fiqA
Thanks! Any chance you can do a rebase on top of torvalds/master? Since Marc's nVHE changes went in, we're going to need to add a workaround patch for the M1's lack of nVHE mode, which is going to be in the next version of my M1 bringup series - but right now that would involve telling people to merge two trees to build a base to apply it on, which is sub-optimal.
-- Hector Martin (marcan@marcan.st) Public Key: https://mrcn.st/pub
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