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    SubjectRe: [PATCH v6 6/8] drm/mediatek: add matrix_bits private data for ccorr
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    Hi, Hsin-Yi:

    On Tue, 2021-02-02 at 16:12 +0800, Hsin-Yi Wang wrote:
    > From: Yongqiang Niu <yongqiang.niu@mediatek.com>
    >
    > Add matrix_bits and coeffs_precision to ccorr private data:
    > - matrix bits of mt8183 is 10
    > - matrix bits of mt8192 is 11
    >

    Reviewed-by: CK Hu <ck.hu@mediatek.com>

    > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
    > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
    > ---
    > drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 27 ++++++++++++++---------
    > 1 file changed, 17 insertions(+), 10 deletions(-)
    >
    > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
    > index 6c86673a835c3..141cb36b9c07b 100644
    > --- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
    > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
    > @@ -30,7 +30,7 @@
    > #define DISP_CCORR_COEF_4 0x0090
    >
    > struct mtk_disp_ccorr_data {
    > - u32 reserved;
    > + u32 matrix_bits;
    > };
    >
    > /**
    > @@ -85,21 +85,22 @@ void mtk_ccorr_stop(struct device *dev)
    > writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN);
    > }
    >
    > -/* Converts a DRM S31.32 value to the HW S1.10 format. */
    > -static u16 mtk_ctm_s31_32_to_s1_10(u64 in)
    > +/* Converts a DRM S31.32 value to the HW S1.n format. */
    > +static u16 mtk_ctm_s31_32_to_s1_n(u64 in, u32 n)
    > {
    > u16 r;
    >
    > /* Sign bit. */
    > - r = in & BIT_ULL(63) ? BIT(11) : 0;
    > + r = in & BIT_ULL(63) ? BIT(n + 1) : 0;
    >
    > if ((in & GENMASK_ULL(62, 33)) > 0) {
    > - /* identity value 0x100000000 -> 0x400, */
    > + /* identity value 0x100000000 -> 0x400(mt8183), */
    > + /* identity value 0x100000000 -> 0x800(mt8192), */
    > /* if bigger this, set it to max 0x7ff. */
    > - r |= GENMASK(10, 0);
    > + r |= GENMASK(n, 0);
    > } else {
    > - /* take the 11 most important bits. */
    > - r |= (in >> 22) & GENMASK(10, 0);
    > + /* take the n+1 most important bits. */
    > + r |= (in >> (32 - n)) & GENMASK(n, 0);
    > }
    >
    > return r;
    > @@ -114,6 +115,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
    > uint16_t coeffs[9] = { 0 };
    > int i;
    > struct cmdq_pkt *cmdq_pkt = NULL;
    > + u32 matrix_bits = ccorr->data->matrix_bits;
    >
    > if (!blob)
    > return;
    > @@ -122,7 +124,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
    > input = ctm->matrix;
    >
    > for (i = 0; i < ARRAY_SIZE(coeffs); i++)
    > - coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
    > + coeffs[i] = mtk_ctm_s31_32_to_s1_n(input[i], matrix_bits);
    >
    > mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
    > &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
    > @@ -199,8 +201,13 @@ static int mtk_disp_ccorr_remove(struct platform_device *pdev)
    > return 0;
    > }
    >
    > +static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
    > + .matrix_bits = 10,
    > +};
    > +
    > static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
    > - { .compatible = "mediatek,mt8183-disp-ccorr"},
    > + { .compatible = "mediatek,mt8183-disp-ccorr",
    > + .data = &mt8183_ccorr_driver_data},
    > {},
    > };
    > MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);

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