Messages in this thread | | | Date | Thu, 18 Feb 2021 20:11:38 +0100 | From | Borislav Petkov <> | Subject | Re: [RFC PATCH] x86/retpolines: Prevent speculation after RET |
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On Thu, Feb 18, 2021 at 08:02:31PM +0100, Peter Zijlstra wrote: > On Thu, Feb 18, 2021 at 07:46:39PM +0100, Borislav Petkov wrote: > > Both vendors speculate after a near RET in some way: > > > > Intel: > > > > "Unlike near indirect CALL and near indirect JMP, the processor will not > > speculatively execute the next sequential instruction after a near RET > > unless that instruction is also the target of a jump or is a target in a > > branch predictor." > > Right, the way I read that means it's not a problem for us here.
Look at that other thread: the instruction *after* the RET can be speculatively executed if that instruction is the target of a jump or it is in a branch predictor.
And yes, the text is confusing and no one from Intel has clarified definitively yet what that text means exactly.
> Now, if AMD were to say something like: hey, that retpoline is pretty > awesome, we ought to use that instead of an uconditional LFENCE, then > sure, but as is, I don't think so.
AMD prefers the LFENCE instead of the ratpoline sequence.
-- Regards/Gruss, Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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