Messages in this thread | | | Date | Wed, 10 Feb 2021 14:18:41 -0600 | From | Rob Herring <> | Subject | Re: [PATCH V3 1/2] dt-bindings: clk: versaclock5: Add optional load capacitance property |
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On Sun, Feb 07, 2021 at 12:51:38PM -0600, Adam Ford wrote: > There are two registers which can set the load capacitance for > XTAL1 and XTAL2. These are optional registers when using an > external crystal. Since XTAL1 and XTAL2 will set to the same value, > update the binding to support a single property called > xtal-load-femtofarads. > > Signed-off-by: Adam Ford <aford173@gmail.com> > --- > V3: No Change > V2: No Change > > A couple people suggested that I not use the $ref, but without it, > the bindings check failed with errors. > > diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > index 2ac1131fd922..c268debe5b8d 100644 > --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > @@ -59,6 +59,12 @@ properties: > minItems: 1 > maxItems: 2 > > + idt,xtal-load-femtofarads: > + $ref: /schemas/types.yaml#/definitions/uint32
Don't need a type with standard unit suffix.
> + minimum: 9000 > + maximum: 22760 > + description: Optional load capacitor for XTAL1 and XTAL2 > + > patternProperties: > "^OUT[1-4]$": > type: object > -- > 2.25.1 >
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