Messages in this thread | | | From | Thomas Gleixner <> | Subject | RE: [patch 5/6] x86/fpu: Provide fpu_update_guest_xcr0/xfd() | Date | Thu, 16 Dec 2021 15:12:53 +0100 |
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On Thu, Dec 16 2021 at 09:59, Kevin Tian wrote: >> From: Thomas Gleixner <tglx@linutronix.de> >> This can be done simply with the MSR entry/exit controls. No trap >> required neither for #NM for for XFD_ERR. >> >> VMENTER loads guest state. VMEXIT saves guest state and loads host state >> (0) > > This implies three MSR operations for every vm-exit. > > With trap we only need one RDMSR in host #NM handler, one > RDMSR/one WRMSR exit in guest #NM handler, which are both rare. > plus one RDMSR/one WRMSR per vm-exit only if saved xfd_err is > non-zero which is again rare.
Fair enough.
>> XFD: Always guest state >> >> So VMENTER does nothing and VMEXIT either saves guest state and the sync >> function uses the automatically saved value or you keep the sync >> function which does the rdmsrl() as is. >> > > Yes, this is the 3rd open that I asked in another reply. The only restriction > with this approach is that the sync cost is added also for legacy OS which > doesn't touch xfd at all.
You still can make that conditional on the guest XCR0. If guest never enables the extended bit then neither the #NM trap nor the XFD sync are required.
But yes, there are too many moving parts here :)
Thanks,
tglx
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