Messages in this thread | | | Subject | Re: [PATCH v5 3/5] pinctrl: qcom: Extract chip specific LPASS LPI code | From | Srinivasa Rao Mandadapu <> | Date | Tue, 14 Dec 2021 22:52:08 +0530 |
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On 12/14/2021 10:46 PM, Andy Shevchenko wrote: > On Tue, Dec 14, 2021 at 7:15 PM Srinivasa Rao Mandadapu > <quic_srivasam@quicinc.com> wrote: >> On 12/8/2021 11:58 AM, Andy Shevchenko wrote: > ... > >>>> +#define NO_SLEW -1 >>> Naming sucks for the header. >>> >>> LPI_NO_SLEW ? >> Actually it's already mainline code. Just these patches are >> rearrangement of old code. >> >> still do you suggest to change? > I would, but this means it should be in a separate change. > > ... Yes. Will do it separate patch later. > >>>> +struct lpi_pingroup { >>>> + const char *name; >>>> + const unsigned int *pins; >>>> + unsigned int npins; >>>> + unsigned int pin; >>>> + /* Bit offset in slew register for SoundWire pins only */ >>>> + int slew_offset; >>>> + unsigned int *funcs; >>>> + unsigned int nfuncs; >>>> +}; >>> Are you going to convert this to use struct group_desc? > Any comments on this? It sounds like further improvements. Actually this also needs as separate patch. these patches will do as separate series. >
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