Messages in this thread | | | Date | Tue, 2 Nov 2021 19:38:02 -0400 | Subject | Re: [PATCH v2 07/13] clk: imx: Add initial support for i.MXRT clock driver | From | Jesse Taube <> |
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On 11/2/21 19:34, Fabio Estevam wrote: > On Tue, Nov 2, 2021 at 7:57 PM Jesse Taube <mr.bossman075@gmail.com> wrote: > >> +#include "clk.h" This is necessary for the indices. >> +#define ANATOP_BASE_ADDR 0x400d8000 OOPs my bad will fix. > > This is now unused. Please remove it. > >> + clk[IMXRT1050_CLK_USDHC1] = imx_clk_gate2("usdhc1", "usdhc1_podf", ccm_base + 0x80, 2); >> + clk[IMXRT1050_CLK_USDHC2] = imx_clk_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4); >> + clk[IMXRT1050_CLK_LPUART1] = imx_clk_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24); >> + clk[IMXRT1050_CLK_LCDIF_APB] = imx_clk_gate2("lcdif", "lcdif_podf", ccm_base + 0x74, 10); >> + clk[IMXRT1050_CLK_DMA] = imx_clk_gate("dma", "ipg", ccm_base + 0x7C, 6); >> + clk[IMXRT1050_CLK_DMA_MUX] = imx_clk_gate("dmamux0", "ipg", ccm_base + 0x7C, 7); > > The imx clock drivers have been converted to the clk_hw API. > Oh will do, didn't know this. > For a reference, please check: > f1541e15e38e ("clk: imx6sx: Switch to clk_hw based API") > > The same conversion could be done here. > >> + imx_check_clocks(clk, ARRAY_SIZE(clk)); >> + clk_data.clks = clk; >> + clk_data.clk_num = ARRAY_SIZE(clk); >> + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); >> + clk_prepare_enable(clk[IMXRT1050_CLK_PLL1_ARM]); >> + clk_prepare_enable(clk[IMXRT1050_CLK_PLL2_SYS]); >> + clk_prepare_enable(clk[IMXRT1050_CLK_PLL3_USB_OTG]); >> + clk_prepare_enable(clk[IMXRT1050_CLK_PLL3_PFD1_664_62M]); >> + clk_prepare_enable(clk[IMXRT1050_CLK_PLL2_PFD2_396M]); > > If these clocks are essential for the SoC to work, then you could pass > the CLK_IS_CRITICAL flag instead of calling clk_prepare_enable() > I'll look into that Thx
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