Messages in this thread | | | Date | Fri, 19 Nov 2021 10:39:15 +0100 | Subject | Re: [PATCH] s390/test_unwind: use raw opcode instead of invalid instruction | From | Christian Borntraeger <> |
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Am 19.11.21 um 02:10 schrieb Nick Desaulniers: > On Wed, Nov 17, 2021 at 9:48 AM Ilie Halip <ilie.halip@gmail.com> wrote: >> >> Building with clang & LLVM_IAS=1 leads to an error: >> arch/s390/lib/test_unwind.c:179:4: error: invalid register pair >> " mvcl %%r1,%%r1\n" >> ^ >> >> The test creates an invalid instruction that would trap at runtime, but the >> LLVM inline assembler tries to validate it at compile time too. >> >> Use the raw instruction opcode instead. >> >> Link: https://github.com/ClangBuiltLinux/linux/issues/1421 >> Reported-by: Nick Desaulniers <ndesaulniers@google.com> >> Signed-off-by: Ilie Halip <ilie.halip@gmail.com> > > Ilie, thanks for the patch! > > So if I understand > https://sourceware.org/binutils/docs/as/s390-Directives.html#s390-Directives > https://sourceware.org/binutils/docs/as/s390-Formats.html > that `e,` prefix is for 16B opcodes?
e is an instruction format as specified by the architecture. See http://publibfp.dhe.ibm.com/epubs/pdf/a227832c.pdf without any parameters. Normally RR would be the right thing for MVCL, but since we try to build an invalid opcode without the assembler noticing (ab)using e seem like a safer approach.
> > LGTM, thanks again. > Suggested-by: Ulrich Weigand <Ulrich.Weigand@de.ibm.com> > Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
added those and added my RB. applied to the s390 tree. Thanks
> > I triple checked that GAS, clang, and GNU objdump are in agreement in > terms of encoding here. > >> --- >> arch/s390/lib/test_unwind.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/s390/lib/test_unwind.c b/arch/s390/lib/test_unwind.c >> index cfc5f5557c06..d342bc884b94 100644 >> --- a/arch/s390/lib/test_unwind.c >> +++ b/arch/s390/lib/test_unwind.c >> @@ -176,7 +176,7 @@ static noinline int unwindme_func4(struct unwindme *u) >> * trigger specification exception >> */ >> asm volatile( >> - " mvcl %%r1,%%r1\n" >> + " .insn e,0x0e11\n" /* mvcl %%r1,%%r1" */ >> "0: nopr %%r7\n" >> EX_TABLE(0b, 0b) >> :); >> -- >> 2.25.1 >> > >
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