Messages in this thread | | | Date | Fri, 8 Oct 2021 13:32:14 +0200 | Subject | Re: [PATCH v10, 2/5] drm/mediatek: add component POSTMASK | From | Matthias Brugger <> |
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On 08/10/2021 04:09, yongqiang.niu wrote: > On Fri, 2021-10-01 at 13:00 +0200, Dafna Hirschfeld wrote: >> >> On 30.09.21 17:52, Yongqiang Niu wrote: >>> This patch add component POSTMASK. >>> >>> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> >>> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> >>> Reviewed-by: CK Hu <ck.hu@mediatek.com> >>> --- >>> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 102 ++++++++++++++- >>> ----- >>> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + >>> 2 files changed, 73 insertions(+), 30 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c >>> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c >>> index 4a2abcf3e5f9..89170ad825fd 100644 >>> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c >>> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c >>> @@ -62,6 +62,12 @@ >>> #define DITHER_ADD_LSHIFT_G(x) (((x) & 0x7) << >>> 4) >>> #define DITHER_ADD_RSHIFT_G(x) (((x) & 0x7) << >>> 0) >>> >>> +#define DISP_POSTMASK_EN 0x0000 >>> +#define POSTMASK_EN BIT(0) >>> +#define DISP_POSTMASK_CFG 0x0020 >>> +#define POSTMASK_RELAY_MODE BIT(0) >>> +#define DISP_POSTMASK_SIZE 0x0030 >>> + >>> struct mtk_ddp_comp_dev { >>> struct clk *clk; >>> void __iomem *regs; >>> @@ -214,6 +220,32 @@ static void mtk_dither_stop(struct device >>> *dev) >>> writel_relaxed(0x0, priv->regs + DISP_DITHER_EN); >>> } >>> >>> +static void mtk_postmask_config(struct device *dev, unsigned int >>> w, >>> + unsigned int h, unsigned int vrefresh, >>> + unsigned int bpc, struct cmdq_pkt >>> *cmdq_pkt) >>> +{ >>> + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); >>> + >>> + mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv- >>>> regs, >>> + DISP_POSTMASK_SIZE); >>> + mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, &priv->cmdq_reg, >>> + priv->regs, DISP_POSTMASK_CFG); >>> +} >>> + >>> +static void mtk_postmask_start(struct device *dev) >>> +{ >>> + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); >>> + >>> + writel(POSTMASK_EN, priv->regs + DISP_POSTMASK_EN); >>> +} >>> + >>> +static void mtk_postmask_stop(struct device *dev) >>> +{ >>> + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); >>> + >>> + writel_relaxed(0x0, priv->regs + DISP_POSTMASK_EN); >>> +} >>> + >>> static const struct mtk_ddp_comp_funcs ddp_aal = { >>> .clk_enable = mtk_aal_clk_enable, >>> .clk_disable = mtk_aal_clk_disable, >>> @@ -289,6 +321,14 @@ static const struct mtk_ddp_comp_funcs ddp_ovl >>> = { >>> .bgclr_in_off = mtk_ovl_bgclr_in_off, >>> }; >>> >>> +static const struct mtk_ddp_comp_funcs ddp_postmask = { >>> + .clk_enable = mtk_ddp_clk_enable, >>> + .clk_disable = mtk_ddp_clk_disable, >>> + .config = mtk_postmask_config, >>> + .start = mtk_postmask_start, >>> + .stop = mtk_postmask_stop, >>> +}; >>> + >>> static const struct mtk_ddp_comp_funcs ddp_rdma = { >>> .clk_enable = mtk_rdma_clk_enable, >>> .clk_disable = mtk_rdma_clk_disable, >>> @@ -324,6 +364,7 @@ static const char * const >>> mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = { >>> [MTK_DISP_MUTEX] = "mutex", >>> [MTK_DISP_OD] = "od", >>> [MTK_DISP_BLS] = "bls", >>> + [MTK_DISP_POSTMASK] = "postmask", >>> }; >>> >>> struct mtk_ddp_comp_match { >>> @@ -333,36 +374,37 @@ struct mtk_ddp_comp_match { >>> }; >>> >>> static const struct mtk_ddp_comp_match >>> mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { >>> - [DDP_COMPONENT_AAL0] = { MTK_DISP_AAL, 0, &ddp_aal >>> }, >>> - [DDP_COMPONENT_AAL1] = { MTK_DISP_AAL, 1, &ddp_aal >>> }, >>> - [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL }, >>> - [DDP_COMPONENT_CCORR] = { MTK_DISP_CCORR, 0, >>> &ddp_ccorr }, >>> - [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, >>> &ddp_color }, >>> - [DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, >>> &ddp_color }, >>> - [DDP_COMPONENT_DITHER] = { MTK_DISP_DITHER, 0, >>> &ddp_dither }, >>> - [DDP_COMPONENT_DPI0] = { MTK_DPI, 0, &ddp_dpi >>> }, >>> - [DDP_COMPONENT_DPI1] = { MTK_DPI, 1, &ddp_dpi >>> }, >>> - [DDP_COMPONENT_DSI0] = { MTK_DSI, 0, &ddp_dsi >>> }, >>> - [DDP_COMPONENT_DSI1] = { MTK_DSI, 1, &ddp_dsi >>> }, >>> - [DDP_COMPONENT_DSI2] = { MTK_DSI, 2, &ddp_dsi >>> }, >>> - [DDP_COMPONENT_DSI3] = { MTK_DSI, 3, &ddp_dsi >>> }, >>> - [DDP_COMPONENT_GAMMA] = { MTK_DISP_GAMMA, 0, >>> &ddp_gamma }, >>> - [DDP_COMPONENT_OD0] = { MTK_DISP_OD, 0, &ddp_od }, >>> - [DDP_COMPONENT_OD1] = { MTK_DISP_OD, 1, &ddp_od }, >>> - [DDP_COMPONENT_OVL0] = { MTK_DISP_OVL, 0, &ddp_ovl >>> }, >>> - [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, &ddp_ovl >>> }, >>> - [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, &ddp_ovl >>> }, >>> - [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, &ddp_ovl >>> }, >>> - [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, &ddp_ovl }, >>> - [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL }, >>> - [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL }, >>> - [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL }, >>> - [DDP_COMPONENT_RDMA0] = { MTK_DISP_RDMA, 0, >>> &ddp_rdma }, >>> - [DDP_COMPONENT_RDMA1] = { MTK_DISP_RDMA, 1, >>> &ddp_rdma }, >>> - [DDP_COMPONENT_RDMA2] = { MTK_DISP_RDMA, 2, >>> &ddp_rdma }, >>> - [DDP_COMPONENT_UFOE] = { MTK_DISP_UFOE, 0, >>> &ddp_ufoe }, >>> - [DDP_COMPONENT_WDMA0] = { MTK_DISP_WDMA, 0, NULL }, >>> - [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL }, >>> + [DDP_COMPONENT_AAL0] = { MTK_DISP_AAL, 0, >>> &ddp_aal }, >>> + [DDP_COMPONENT_AAL1] = { MTK_DISP_AAL, 1, >>> &ddp_aal }, >>> + [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL }, >>> + [DDP_COMPONENT_CCORR] = { MTK_DISP_CCORR, 0, >>> &ddp_ccorr }, >>> + [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, >>> &ddp_color }, >>> + [DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, >>> &ddp_color }, >>> + [DDP_COMPONENT_DITHER] = { MTK_DISP_DITHER, 0, >>> &ddp_dither }, >>> + [DDP_COMPONENT_DPI0] = { MTK_DPI, 0, >>> &ddp_dpi }, >>> + [DDP_COMPONENT_DPI1] = { MTK_DPI, 1, >>> &ddp_dpi }, >>> + [DDP_COMPONENT_DSI0] = { MTK_DSI, 0, >>> &ddp_dsi }, >>> + [DDP_COMPONENT_DSI1] = { MTK_DSI, 1, >>> &ddp_dsi }, >>> + [DDP_COMPONENT_DSI2] = { MTK_DSI, 2, >>> &ddp_dsi }, >>> + [DDP_COMPONENT_DSI3] = { MTK_DSI, 3, >>> &ddp_dsi }, >>> + [DDP_COMPONENT_GAMMA] = { MTK_DISP_GAMMA, 0, >>> &ddp_gamma }, >>> + [DDP_COMPONENT_OD0] = { MTK_DISP_OD, 0, &ddp_od >>> }, >>> + [DDP_COMPONENT_OD1] = { MTK_DISP_OD, 1, &ddp_od >>> }, >>> + [DDP_COMPONENT_OVL0] = { MTK_DISP_OVL, 0, >>> &ddp_ovl }, >>> + [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, >>> &ddp_ovl }, >>> + [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, >>> &ddp_ovl }, >>> + [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, >>> &ddp_ovl }, >>> + [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, >>> &ddp_ovl }, >>> + [DDP_COMPONENT_POSTMASK0] = { MTK_DISP_POSTMASK, 0, >>> &ddp_postmask }, >> >> Hi, I can't see where is DDP_COMPONENT_POSTMASK0 defined. >> >> Thanks, >> Dafna > > it is defined in mtk_mmsys.h > > > https://patchwork.kernel.org/project/linux-mediatek/patch/20210930155222.5861-3-yongqiang.niu@mediatek.com/ >
That link is not really usefull. It's part of my maintainer repo: https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/log/?h=v5.15-next/soc
My fault not having pushed that to linux-next.
Regards, Matthias
>> >>> + [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, >>> NULL }, >>> + [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, >>> NULL }, >>> + [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, >>> NULL }, >>> + [DDP_COMPONENT_RDMA0] = { MTK_DISP_RDMA, 0, >>> &ddp_rdma }, >>> + [DDP_COMPONENT_RDMA1] = { MTK_DISP_RDMA, 1, >>> &ddp_rdma }, >>> + [DDP_COMPONENT_RDMA2] = { MTK_DISP_RDMA, 2, >>> &ddp_rdma }, >>> + [DDP_COMPONENT_UFOE] = { MTK_DISP_UFOE, 0, >>> &ddp_ufoe }, >>> + [DDP_COMPONENT_WDMA0] = { MTK_DISP_WDMA, 0, >>> NULL }, >>> + [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, >>> NULL }, >>> }; >>> >>> static bool mtk_drm_find_comp_in_ddp(struct device *dev, >>> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h >>> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h >>> index bb914d976cf5..cd1dec6b4cdf 100644 >>> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h >>> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h >>> @@ -30,6 +30,7 @@ enum mtk_ddp_comp_type { >>> MTK_DISP_UFOE, >>> MTK_DSI, >>> MTK_DPI, >>> + MTK_DISP_POSTMASK, >>> MTK_DISP_PWM, >>> MTK_DISP_MUTEX, >>> MTK_DISP_OD, >>>
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