Messages in this thread | | | Subject | Re: [PATCH 4/4] perf vendor events: Add the Neoverse V1 to arm64 mapfile | From | Andrew Kilroy <> | Date | Wed, 6 Oct 2021 09:29:32 +0100 |
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On 06/10/2021 09:20, Andrew Kilroy wrote: > Hi Arnaldo + John, > > On 05/10/2021 18:58, Arnaldo Carvalho de Melo wrote: >> Em Tue, Oct 05, 2021 at 10:33:49AM +0100, John Garry escreveu: >>> On 04/10/2021 17:00, Andrew Kilroy wrote: >>>> This is so that performance counters for the Neoverse V1 appear >>>> categorised upon running 'perf list' on the CPU. >>>> >>> >>> this really belongs with the previous patch >> >> Waiting for a resolution on this one. >> >> - Arnaldo >>> Thanks, >>> John >>> > > Sent a v2 of these patches > > Andrew
I forgot to add, thanks for the review!
Andrew
> > > >>>> Signed-off-by: Andrew Kilroy <andrew.kilroy@arm.com> >>>> --- >>>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 + >>>> 1 file changed, 1 insertion(+) >>>> >>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv >>>> b/tools/perf/pmu-events/arch/arm64/mapfile.csv >>>> index c43591d831b8..31d8b57ca9bb 100644 >>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv >>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv >>>> @@ -18,6 +18,7 @@ >>>> 0x00000000410fd080,v1,arm/cortex-a57-a72,core >>>> 0x00000000410fd0b0,v1,arm/cortex-a76-n1,core >>>> 0x00000000410fd0c0,v1,arm/cortex-a76-n1,core >>>> +0x00000000410fd400,v1,arm/neoverse-v1,core >>>> 0x00000000420f5160,v1,cavium/thunderx2,core >>>> 0x00000000430f0af0,v1,cavium/thunderx2,core >>>> 0x00000000460f0010,v1,fujitsu/a64fx,core >>>> >>
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