Messages in this thread | | | From | Krzysztof Kozlowski <> | Subject | Re: [PATCH v5 0/9] tegra20-emc: Identify memory chip by LPDDR configuration | Date | Fri, 15 Oct 2021 09:20:13 +0200 |
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On Thu, 7 Oct 2021 01:46:50 +0300, Dmitry Osipenko wrote: > Support memory chip identification by LPDDR2 configuration, which is > needed by ASUS Transformer TF101 tablet device that doesn't store RAMCODE > in Tegra's NVMEM. > > Changelog: > > v5: - Added new patch which adds vendor prefix for Elpida Inc. > > [...]
Applied, thanks!
[1/9] dt-bindings: Relocate DDR bindings (no commit info) [2/9] dt-bindings: memory: lpddr2: Convert to schema commit: 8a3294b74ac621ab03ef88cb964c13089ffdf015 [3/9] dt-bindings: memory: lpddr2: Add revision-id properties commit: 3c1a1b4b191978559cae5c626da012ef897c1139 [4/9] dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F commit: 624f42157b99d253e6a52a7f93123eb0dbe1b26c [5/9] dt-bindings: Add vendor prefix for Elpida Memory commit: 8712faaf12106bc70fcaef2cb89f7958faddbe59 [7/9] dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node commit: ab4dd82cf5f8dd1943acf9243058262bc33c5af6 [8/9] memory: Add LPDDR2-info helpers commit: 5c767f684651e74f81c4d6a363e3779af3a77cc0 [9/9] memory: tegra20-emc: Support matching timings by LPDDR2 configuration commit: 4964b3e5c9ad4ad85b44f826a12c008af826545c
(dts patch not applied)
Best regards, -- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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