lkml.org 
[lkml]   [2021]   [Oct]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH 0/2] riscv: Add RISC-V svpbmt extension supports
Please add V3 in the prefix, I think you need to resend it with PATCH
V3 and abandon this one.

On Wed, Oct 13, 2021 at 2:34 AM <wefu@redhat.com> wrote:
>
> From: Fu Wei <fu.wei@linaro.org>
>
> This patch follows the standard pure RISC-V Svpbmt extension in
> privilege spec to solve the non-coherent SOC DMA synchronization
> issues.
>
> Wei Fu (2):
> dt-bindings: riscv: Add mmu-supports with svpbmt
> riscv: Add RISC-V svpbmt supports
>
> .../devicetree/bindings/riscv/cpus.yaml | 5 +++
> arch/riscv/include/asm/fixmap.h | 2 +-
> arch/riscv/include/asm/pgtable-64.h | 8 ++--
> arch/riscv/include/asm/pgtable-bits.h | 41 ++++++++++++++++++-
> arch/riscv/include/asm/pgtable.h | 39 ++++++++++++++----
> arch/riscv/kernel/cpufeature.c | 32 +++++++++++++++
> arch/riscv/mm/init.c | 5 +++
> 7 files changed, 117 insertions(+), 15 deletions(-)
>
> --
> 2.25.4
>


--
Best Regards
Guo Ren

ML: https://lore.kernel.org/linux-csky/

\
 
 \ /
  Last update: 2021-10-13 05:38    [W:0.974 / U:0.012 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site