Messages in this thread | | | From | Haakon Bugge <> | Subject | Enabling RO on a VF | Date | Fri, 1 Oct 2021 11:05:15 +0000 |
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Hey,
Commit 1477d44ce47d ("RDMA/mlx5: Enable Relaxed Ordering by default for kernel ULPs") uses pcie_relaxed_ordering_enabled() to check if RO can be enabled. This function checks if the Enable Relaxed Ordering bit in the Device Control register is set. However, on a VF, this bit is RsvdP (Reserved for future RW implementations. Register bits are read-only and must return zero when read. Software must preserve the value read for writes to bits.).
Hence, AFAICT, RO will not be enabled when using a VF.
How can that be fixed?
Thxs, Håkon
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