lkml.org 
[lkml]   [2021]   [Jan]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v6 07/26] coresight: etm4x: Always read the registers on the host CPU
    Date
    As we are about to add support for sysreg access to ETM4.4+ components,
    make sure that we read the registers only on the host CPU.

    Cc: Mike Leach <mike.leach@linaro.org>
    Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
    Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
    ---
    .../coresight/coresight-etm4x-sysfs.c | 23 ++++++++-----------
    1 file changed, 10 insertions(+), 13 deletions(-)

    diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
    index 989ce7b8ade7..c4781d4e5886 100644
    --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
    +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
    @@ -2344,23 +2344,20 @@ static u32 etmv4_cross_read(const struct device *dev, u32 offset)
    return reg.data;
    }

    -#define coresight_etm4x_reg(name, offset) \
    - coresight_simple_reg32(struct etmv4_drvdata, name, offset)
    -
    #define coresight_etm4x_cross_read(name, offset) \
    coresight_simple_func(struct etmv4_drvdata, etmv4_cross_read, \
    name, offset)

    -coresight_etm4x_reg(trcpdcr, TRCPDCR);
    -coresight_etm4x_reg(trcpdsr, TRCPDSR);
    -coresight_etm4x_reg(trclsr, TRCLSR);
    -coresight_etm4x_reg(trcauthstatus, TRCAUTHSTATUS);
    -coresight_etm4x_reg(trcdevid, TRCDEVID);
    -coresight_etm4x_reg(trcdevtype, TRCDEVTYPE);
    -coresight_etm4x_reg(trcpidr0, TRCPIDR0);
    -coresight_etm4x_reg(trcpidr1, TRCPIDR1);
    -coresight_etm4x_reg(trcpidr2, TRCPIDR2);
    -coresight_etm4x_reg(trcpidr3, TRCPIDR3);
    +coresight_etm4x_cross_read(trcpdcr, TRCPDCR);
    +coresight_etm4x_cross_read(trcpdsr, TRCPDSR);
    +coresight_etm4x_cross_read(trclsr, TRCLSR);
    +coresight_etm4x_cross_read(trcauthstatus, TRCAUTHSTATUS);
    +coresight_etm4x_cross_read(trcdevid, TRCDEVID);
    +coresight_etm4x_cross_read(trcdevtype, TRCDEVTYPE);
    +coresight_etm4x_cross_read(trcpidr0, TRCPIDR0);
    +coresight_etm4x_cross_read(trcpidr1, TRCPIDR1);
    +coresight_etm4x_cross_read(trcpidr2, TRCPIDR2);
    +coresight_etm4x_cross_read(trcpidr3, TRCPIDR3);
    coresight_etm4x_cross_read(trcoslsr, TRCOSLSR);
    coresight_etm4x_cross_read(trcconfig, TRCCONFIGR);
    coresight_etm4x_cross_read(trctraceid, TRCTRACEIDR);
    --
    2.24.1
    \
     
     \ /
      Last update: 2021-01-07 13:42    [W:4.114 / U:0.140 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site