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Subject[PATCH] mtd: rawnand: qcom: Update register macro name for 0x2c offset
This change will remove unused register name macro NAND_DEV1_ECC_CFG.
Since this register was only available in QPIC version 1.4.20 ipq40xx
and it was not used. In QPIC version 1.5 on wards this register got
removed.In QPIC version 2.0 0x2c offset is updated with register
NAND_AUTO_STATUS_EN So adding this register macro NAND_AUTO_STATUS_EN
with offset 0x2c.

Signed-off-by: Md Sadre Alam <>
drivers/mtd/nand/raw/qcom_nandc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index 9484be8..c238a35 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -27,7 +27,7 @@
#define NAND_DEV0_CFG0 0x20
#define NAND_DEV0_CFG1 0x24
#define NAND_DEV0_ECC_CFG 0x28
-#define NAND_DEV1_ECC_CFG 0x2c
+#define NAND_AUTO_STATUS_EN 0x2c
#define NAND_DEV1_CFG0 0x30
#define NAND_DEV1_CFG1 0x34
#define NAND_READ_ID 0x40
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