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    Subject[PATCH v4 24/34] dt-bindings: misc: Add Keem Bay vpumgr
    Date
    From: "Li, Tingqian" <tingqian.li@intel.com>

    Add DT binding schema for VPU on Keem Bay ASoC platform

    Cc: Rob Herring <robh+dt@kernel.org>
    Cc: devicetree@vger.kernel.org
    Signed-off-by: Li Tingqian <tingqian.li@intel.com>
    Signed-off-by: Mark Gross <mgross@linux.intel.com>
    ---
    .../bindings/misc/intel,keembay-vpu-mgr.yaml | 48 +++++++++++++++++++
    1 file changed, 48 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/misc/intel,keembay-vpu-mgr.yaml

    diff --git a/Documentation/devicetree/bindings/misc/intel,keembay-vpu-mgr.yaml b/Documentation/devicetree/bindings/misc/intel,keembay-vpu-mgr.yaml
    new file mode 100644
    index 000000000000..a44f492277ab
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/misc/intel,keembay-vpu-mgr.yaml
    @@ -0,0 +1,48 @@
    +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
    +# Copyright (C) 2020 Intel
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/misc/intel,keembay-vpu-mgr.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Intel VPU manager bindings
    +
    +maintainers:
    + - Li, Tingqian <tingqian.li@intel.com>
    + - Zhou, Luwei <luwei.zhou@intel.com>
    +
    +description: |
    + The Intel VPU manager provides shared memory and process
    + depedent context management for Intel VPU hardware IP.
    +
    +properties:
    + compatible:
    + items:
    + - enum:
    + - intel,keembay-vpu-mgr
    + - intel,keembay-vpusmm
    +
    + memory-region:
    + description:
    + phandle to a node describing reserved memory (System RAM memory)
    + used by VPU (see bindings/reserved-memory/reserved-memory.txt)
    + maxItems: 1
    +
    + intel,keembay-vpu-ipc-id:
    + $ref: /schemas/types.yaml#/definitions/uint32
    + description:
    + the index of the VPU slice to be managed. Default is 0.
    +
    +required:
    + - compatible
    + - memory-region
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + vpumgr0 {
    + compatible = "intel,keembay-vpu-mgr";
    + memory-region = <&vpu_reserved>;
    + intel,keembay-vpu-ipc-id = <0x0>;
    + };
    --
    2.17.1
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