Messages in this thread | | | Date | Thu, 28 Jan 2021 15:57:58 +0100 | From | Peter Zijlstra <> | Subject | Re: [PATCH 1/6] MIPS: Octeon: Implement __smp_store_release() |
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On Thu, Jan 28, 2021 at 12:52:22PM +0100, Alexander Sverdlin wrote: > Hello Peter, > > On 28/01/2021 12:33, Peter Zijlstra wrote: > > This, from commit 6b07d38aaa52 ("MIPS: Octeon: Use optimized memory > > barrier primitives."): > > > > #define smp_mb__before_llsc() smp_wmb() > > #define __smp_mb__before_llsc() __smp_wmb() > > > > is also dodgy as hell and really wants a comment too. I'm not buying the > > Changelog of that commit either, __smp_mb__before_llsc should also > > ensure the LL cannot happen earlier, but SYNCW has no effect on loads. > > So what stops the load from being speculated? > > hmm, the commit message you point to above, says: > > "Since Octeon does not do speculative reads, this functions as a full barrier."
So then the only difference between SYNC and SYNCW is a pipeline drain?
I still worry about the transitivity thing.. ISTR that being a sticky point back then too.
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