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SubjectRe: [PATCH v2] arm64: dts: ti: k3-j7200-main: Add support for higher speed modes in MMCSD subsystems
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Hi,

On 25/01/21 9:55 pm, Aswath Govindraju wrote:
> The following speed modes are now supported in J7200 SoC,
> - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1].
> - UHS-I speed modes in MMCSD1 subsystem [1].
>
> Set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1 device
> tree nodes.
>
> [1] - section 12.3.6.1.1 MMCSD Features, in
> https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf
>
> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
> ---
>
> performance test logs using EXT4 filesystem for eMMC HS400 speed mode,
> https://pastebin.ubuntu.com/p/JnPs8DxV58/
>
> performance test logs using EXT4 filesystem for SD SDR104 speed mode,
> https://pastebin.ubuntu.com/p/KPGzBz8YwC/
>
> Changes since v1:
> - Squashed the two patches into one
> - added performance logs for the above mentioned speed modes
>
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 4cc2e9094d0e..4b3d0b5739e8 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -517,6 +517,8 @@
> ti,trm-icp = <0x8>;
> bus-width = <8>;
> mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> dma-coherent;
> };
>
> @@ -534,7 +536,6 @@
> ti,otap-del-sel-sdr50 = <0xc>;
> ti,otap-del-sel-sdr104 = <0x5>;
> ti,otap-del-sel-ddr50 = <0xc>;
> - no-1-8-v;
> dma-coherent;
> };
>
>

Please ignore this patch. Sorry, I forgot to add voltage regulator nodes
required to enable UHS modes. While testing there was an error from my
side.

Thanks,
Aswath

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