Messages in this thread | | | Date | Thu, 28 Jan 2021 09:46:25 +1030 | From | "Andrew Jeffery" <> | Subject | Re: [PATCH] ARM: dts: aspeed: amd-ethanolx: Enable secondary L PC snooping address |
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On Thu, 28 Jan 2021, at 04:53, Konstantin Aladyshev wrote: > AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81. > Currently ASPEED controller snoops only 0x80 port and therefore captures > only the lower byte of each POST code. > Enable secondary LPC snooping address to capture the higher byte of POST > codes. > > Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
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