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SubjectRe: [PATCH v5 2/5] ARM: dts: Remove LPC BMC and Host partitions


On Thu, 14 Jan 2021, at 23:46, Chia-Wei, Wang wrote:
> The LPC controller has no concept of the BMC and the Host partitions.
>
> A concrete instance is that the HICRB[5:4] are for the I/O port address
> configurtaion of KCS channel 1/2. However, the KCS driver cannot access
> HICRB for channel 1/2 initialization via syscon regmap interface due to
> the parition boundary. (i.e. offset 80h)
>
> In addition, for the HW design backward compatibility, a newly added HW
> control bit could be located at any reserved one over the LPC addressing
> space. Thereby, this patch removes the lpc-bmc and lpc-host child node
> and thus the LPC partitioning.
>
> Note that this change requires the synchronization between device tree
> change and the driver change. To prevent the misuse of old devicetrees
> with new drivers, or vice versa, the v2 compatible strings are adopted
> for the LPC device as listed:
>
> "aspeed,ast2400-lpc-v2"
> "aspeed,ast2500-lpc-v2"
> "aspeed,ast2600-lpc-v2"
>
> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
> ---
> arch/arm/boot/dts/aspeed-g4.dtsi | 74 +++++++----------
> arch/arm/boot/dts/aspeed-g5.dtsi | 135 ++++++++++++++-----------------
> arch/arm/boot/dts/aspeed-g6.dtsi | 135 ++++++++++++++-----------------

I've booted a Witherspoon BMC and host with these patches applied, so for
aspeed-g5.dtsi:

Tested-by: Andrew Jeffery <andrew@aj.id.au>

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