Messages in this thread | | | Date | Sun, 17 Jan 2021 12:24:46 +0100 | From | Wolfram Sang <> | Subject | Re: [PATCH v3] i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO |
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On Tue, Jan 12, 2021 at 11:02:41AM -0800, Sowjanya Komatineni wrote: > VI I2C controller has known hardware bug where immediate multiple > writes to TX_FIFO register gets stuck. > > Recommended software work around is to read I2C register after > each write to TX_FIFO register to flush out the data. > > This patch implements this work around for VI I2C controller. > > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Applied to for-current, thanks!
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