Messages in this thread | | | Subject | Re: [PATCH v3 05/17] KVM: x86/pmu: Reprogram guest PEBS event to emulate guest PEBS counter | From | "Xu, Like" <> | Date | Fri, 15 Jan 2021 21:53:22 +0800 |
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On 2021/1/15 19:33, Peter Zijlstra wrote: > On Mon, Jan 04, 2021 at 09:15:30PM +0800, Like Xu wrote: >> When a guest counter is configured as a PEBS counter through >> IA32_PEBS_ENABLE, a guest PEBS event will be reprogrammed by >> configuring a non-zero precision level in the perf_event_attr. >> >> The guest PEBS overflow PMI bit would be set in the guest >> GLOBAL_STATUS MSR when PEBS facility generates a PEBS >> overflow PMI based on guest IA32_DS_AREA MSR. >> >> The attr.precise_ip would be adjusted to a special precision >> level when the new PEBS-PDIR feature is supported later which >> would affect the host counters scheduling. > This seems like a random collection of changes, all required, but > loosely related.
Yes, these changes are made in the KVM context, and they are all necessary to emulate basic PEBS hw behavior.
> >> The guest PEBS event would not be reused for non-PEBS >> guest event even with the same guest counter index.
Let me add more KVM context here,
we would create a perf_event for a normal non-PEBS counter and we reuse the same perf_event from time to time as much as possible instead of "create + destroy" new perf_event.
So when a normal counter is configured for PEBS, the original perf_event would not be reused and a new PEBS perf_event is created, vice verse.
> /me rolls eyes at the whole destroy+create nonsense...
I absolutely agree that cross-domain development may make maintainers' eyes uncomfortable.
My on-demand explanation is always online if you fire more questions on this patch set.
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