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    Subject[PATCH 5.10 004/145] net: mvpp2: Add TCAM entry to drop flow control pause frames
    Date
    From: Stefan Chulski <stefanc@marvell.com>

    [ Upstream commit 3f48fab62bb81a7f9d01e9d43c40395fad011dd5 ]

    Issue:
    Flow control frame used to pause GoP(MAC) was delivered to the CPU
    and created a load on the CPU. Since XOFF/XON frames are used only
    by MAC, these frames should be dropped inside MAC.

    Fix:
    According to 802.3-2012 - IEEE Standard for Ethernet pause frame
    has unique destination MAC address 01-80-C2-00-00-01.
    Add TCAM parser entry to track and drop pause frames by destination MAC.

    Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375 network unit")
    Signed-off-by: Stefan Chulski <stefanc@marvell.com>
    Link: https://lore.kernel.org/r/1608229817-21951-1-git-send-email-stefanc@marvell.com
    Signed-off-by: Jakub Kicinski <kuba@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c | 33 +++++++++++++++++++++++++
    drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.h | 2 -
    2 files changed, 34 insertions(+), 1 deletion(-)

    --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
    +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
    @@ -405,6 +405,38 @@ static int mvpp2_prs_tcam_first_free(str
    return -EINVAL;
    }

    +/* Drop flow control pause frames */
    +static void mvpp2_prs_drop_fc(struct mvpp2 *priv)
    +{
    + unsigned char da[ETH_ALEN] = { 0x01, 0x80, 0xC2, 0x00, 0x00, 0x01 };
    + struct mvpp2_prs_entry pe;
    + unsigned int len;
    +
    + memset(&pe, 0, sizeof(pe));
    +
    + /* For all ports - drop flow control frames */
    + pe.index = MVPP2_PE_FC_DROP;
    + mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_MAC);
    +
    + /* Set match on DA */
    + len = ETH_ALEN;
    + while (len--)
    + mvpp2_prs_tcam_data_byte_set(&pe, len, da[len], 0xff);
    +
    + mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_DROP_MASK,
    + MVPP2_PRS_RI_DROP_MASK);
    +
    + mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
    + mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_FLOWS);
    +
    + /* Mask all ports */
    + mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK);
    +
    + /* Update shadow table and hw entry */
    + mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_MAC);
    + mvpp2_prs_hw_write(priv, &pe);
    +}
    +
    /* Enable/disable dropping all mac da's */
    static void mvpp2_prs_mac_drop_all_set(struct mvpp2 *priv, int port, bool add)
    {
    @@ -1162,6 +1194,7 @@ static void mvpp2_prs_mac_init(struct mv
    mvpp2_prs_hw_write(priv, &pe);

    /* Create dummy entries for drop all and promiscuous modes */
    + mvpp2_prs_drop_fc(priv);
    mvpp2_prs_mac_drop_all_set(priv, 0, false);
    mvpp2_prs_mac_promisc_set(priv, 0, MVPP2_PRS_L2_UNI_CAST, false);
    mvpp2_prs_mac_promisc_set(priv, 0, MVPP2_PRS_L2_MULTI_CAST, false);
    --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.h
    +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.h
    @@ -129,7 +129,7 @@
    #define MVPP2_PE_VID_EDSA_FLTR_DEFAULT (MVPP2_PRS_TCAM_SRAM_SIZE - 7)
    #define MVPP2_PE_VLAN_DBL (MVPP2_PRS_TCAM_SRAM_SIZE - 6)
    #define MVPP2_PE_VLAN_NONE (MVPP2_PRS_TCAM_SRAM_SIZE - 5)
    -/* reserved */
    +#define MVPP2_PE_FC_DROP (MVPP2_PRS_TCAM_SRAM_SIZE - 4)
    #define MVPP2_PE_MAC_MC_PROMISCUOUS (MVPP2_PRS_TCAM_SRAM_SIZE - 3)
    #define MVPP2_PE_MAC_UC_PROMISCUOUS (MVPP2_PRS_TCAM_SRAM_SIZE - 2)
    #define MVPP2_PE_MAC_NON_PROMISCUOUS (MVPP2_PRS_TCAM_SRAM_SIZE - 1)

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