Messages in this thread | | | Date | Tue, 8 Sep 2020 17:58:40 +0200 | From | peterz@infradea ... | Subject | Re: [PATCH V2 3/3] perf/x86: Reset the dirty counter to prevent the leak for an RDPMC task |
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On Mon, Sep 07, 2020 at 06:01:15PM +0200, peterz@infradead.org wrote: > On Fri, Aug 21, 2020 at 12:57:54PM -0700, kan.liang@linux.intel.com wrote: > > diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c > > index 0f3d01562ded..fa08d810dcd2 100644 > > --- a/arch/x86/events/core.c > > +++ b/arch/x86/events/core.c > > @@ -1440,7 +1440,10 @@ static void x86_pmu_start(struct perf_event *event, int flags) > > > > cpuc->events[idx] = event; > > __set_bit(idx, cpuc->active_mask); > > - __set_bit(idx, cpuc->running); > > + /* The cpuc->running is only used by the P4 PMU */ > > + if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON) && > > + (boot_cpu_data.x86 == 0xf)) > > + __set_bit(idx, cpuc->running); > > x86_pmu.enable(event); > > perf_event_update_userpage(event); > > } > > Yuck! Use a static_branch() or something. This is a gnarly nest of code > that runs 99.9% of the time to conclude a negative. IOW a complete waste > of cycles for everybody not running a P4 space heater.
Better still, move it into p4_pmu_enable_event().
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