lkml.org 
[lkml]   [2020]   [Sep]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v7 26/72] x86/fpu: Move xgetbv()/xsetbv() into separate header
    Date
    From: Joerg Roedel <jroedel@suse.de>

    The xgetbv() function is needed in pre-decompression boot code, but
    asm/fpu/internal.h can't be included there directly. Doing so opens
    the door to include-hell due to various include-magic in
    boot/compressed/misc.h.

    Avoid that by moving xgetbv()/xsetbv() to a separate header file and
    include this instead.

    Signed-off-by: Joerg Roedel <jroedel@suse.de>
    ---
    arch/x86/include/asm/fpu/internal.h | 30 +------------------------
    arch/x86/include/asm/fpu/xcr.h | 34 +++++++++++++++++++++++++++++
    2 files changed, 35 insertions(+), 29 deletions(-)
    create mode 100644 arch/x86/include/asm/fpu/xcr.h

    diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
    index 21a8b5259477..ceeba9f63172 100644
    --- a/arch/x86/include/asm/fpu/internal.h
    +++ b/arch/x86/include/asm/fpu/internal.h
    @@ -19,6 +19,7 @@
    #include <asm/user.h>
    #include <asm/fpu/api.h>
    #include <asm/fpu/xstate.h>
    +#include <asm/fpu/xcr.h>
    #include <asm/cpufeature.h>
    #include <asm/trace/fpu.h>

    @@ -585,33 +586,4 @@ static inline void switch_fpu_finish(struct fpu *new_fpu)
    __write_pkru(pkru_val);
    }

    -/*
    - * MXCSR and XCR definitions:
    - */
    -
    -static inline void ldmxcsr(u32 mxcsr)
    -{
    - asm volatile("ldmxcsr %0" :: "m" (mxcsr));
    -}
    -
    -extern unsigned int mxcsr_feature_mask;
    -
    -#define XCR_XFEATURE_ENABLED_MASK 0x00000000
    -
    -static inline u64 xgetbv(u32 index)
    -{
    - u32 eax, edx;
    -
    - asm volatile("xgetbv" : "=a" (eax), "=d" (edx) : "c" (index));
    - return eax + ((u64)edx << 32);
    -}
    -
    -static inline void xsetbv(u32 index, u64 value)
    -{
    - u32 eax = value;
    - u32 edx = value >> 32;
    -
    - asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index));
    -}
    -
    #endif /* _ASM_X86_FPU_INTERNAL_H */
    diff --git a/arch/x86/include/asm/fpu/xcr.h b/arch/x86/include/asm/fpu/xcr.h
    new file mode 100644
    index 000000000000..1c7ab8d95da5
    --- /dev/null
    +++ b/arch/x86/include/asm/fpu/xcr.h
    @@ -0,0 +1,34 @@
    +/* SPDX-License-Identifier: GPL-2.0 */
    +#ifndef _ASM_X86_FPU_XCR_H
    +#define _ASM_X86_FPU_XCR_H
    +
    +/*
    + * MXCSR and XCR definitions:
    + */
    +
    +static inline void ldmxcsr(u32 mxcsr)
    +{
    + asm volatile("ldmxcsr %0" :: "m" (mxcsr));
    +}
    +
    +extern unsigned int mxcsr_feature_mask;
    +
    +#define XCR_XFEATURE_ENABLED_MASK 0x00000000
    +
    +static inline u64 xgetbv(u32 index)
    +{
    + u32 eax, edx;
    +
    + asm volatile("xgetbv" : "=a" (eax), "=d" (edx) : "c" (index));
    + return eax + ((u64)edx << 32);
    +}
    +
    +static inline void xsetbv(u32 index, u64 value)
    +{
    + u32 eax = value;
    + u32 edx = value >> 32;
    +
    + asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index));
    +}
    +
    +#endif /* _ASM_X86_FPU_XCR_H */
    --
    2.28.0
    \
     
     \ /
      Last update: 2020-09-07 19:38    [W:4.100 / U:0.456 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site