Messages in this thread Patch in this message | | | Date | Wed, 30 Sep 2020 05:53:55 -0000 | From | "tip-bot2 for Tony Luck" <> | Subject | [tip: ras/core] x86/mce: Drop AMD-specific "DEFERRED" case from Intel severity rule list |
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The following commit has been merged into the ras/core branch of tip:
Commit-ID: ed9705e4ad1c19ae51ed0cb4c112f9eb6dfc69fc Gitweb: https://git.kernel.org/tip/ed9705e4ad1c19ae51ed0cb4c112f9eb6dfc69fc Author: Tony Luck <tony.luck@intel.com> AuthorDate: Tue, 29 Sep 2020 19:13:13 -07:00 Committer: Borislav Petkov <bp@suse.de> CommitterDate: Wed, 30 Sep 2020 07:49:58 +02:00
x86/mce: Drop AMD-specific "DEFERRED" case from Intel severity rule list
Way back in v3.19 Intel and AMD shared the same machine check severity grading code. So it made sense to add a case for AMD DEFERRED errors in commit
e3480271f592 ("x86, mce, severity: Extend the the mce_severity mechanism to handle UCNA/DEFERRED error")
But later in v4.2 AMD switched to a separate grading function in commit
bf80bbd7dcf5 ("x86/mce: Add an AMD severities-grading function")
Belatedly drop the DEFERRED case from the Intel rule list.
Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20200930021313.31810-3-tony.luck@intel.com --- arch/x86/kernel/cpu/mce/severity.c | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/severity.c b/arch/x86/kernel/cpu/mce/severity.c index 567ce09..e072246 100644 --- a/arch/x86/kernel/cpu/mce/severity.c +++ b/arch/x86/kernel/cpu/mce/severity.c @@ -97,10 +97,6 @@ static struct severity { EXCP, KERNEL_RECOV, MCGMASK(MCG_STATUS_RIPV, 0) ), MCESEV( - DEFERRED, "Deferred error", - NOSER, MASK(MCI_STATUS_UC|MCI_STATUS_DEFERRED|MCI_STATUS_POISON, MCI_STATUS_DEFERRED) - ), - MCESEV( KEEP, "Corrected error", NOSER, BITCLR(MCI_STATUS_UC) ),
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