Messages in this thread | | | Date | Wed, 30 Sep 2020 12:23:27 +0530 | From | Pratyush Yadav <> | Subject | Re: [PATCH v13 06/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table |
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On 30/09/20 06:44AM, Tudor.Ambarus@microchip.com wrote: > On 9/16/20 3:44 PM, Pratyush Yadav wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > This table is indication that the flash is xSPI compliant and hence > > supports octal DTR mode. Extract information like the fast read opcode, > > dummy cycles, the number of dummy cycles needed for a Read Status > > Register command, and the number of address bytes needed for a Read > > Status Register command. > > > > We don't know what speed the controller is running at. Find the fast > > read dummy cycles for the fastest frequency the flash can run at to be > > sure we are never short of dummy cycles. If nothing is available, > > default to 20. Flashes that use a different value should update it in > > their fixup hooks. > > > > Since we want to set read settings, expose spi_nor_set_read_settings() > > in core.h. > > > > Signed-off-by: Pratyush Yadav <p.yadav@ti.com> > > --- > > drivers/mtd/spi-nor/core.c | 2 +- > > drivers/mtd/spi-nor/core.h | 10 +++++ > > drivers/mtd/spi-nor/sfdp.c | 91 ++++++++++++++++++++++++++++++++++++++ > > 3 files changed, 102 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > > index 7445d7122304..cbb1aab27d03 100644 > > --- a/drivers/mtd/spi-nor/core.c > > +++ b/drivers/mtd/spi-nor/core.c ... > > @@ -1108,6 +1110,91 @@ static int spi_nor_parse_4bait(struct spi_nor > > *nor, > > return ret; > > } > > > > +#define PROFILE1_DWORD1_RDSR_ADDR_BYTES BIT(29) > > +#define PROFILE1_DWORD1_RDSR_DUMMY BIT(28) > > +#define PROFILE1_DWORD1_RD_FAST_CMD GENMASK(15, 8) > > +#define PROFILE1_DWORD4_DUMMY_200MHZ GENMASK(11, 7) > > +#define PROFILE1_DWORD5_DUMMY_166MHZ GENMASK(31, 27) > > +#define PROFILE1_DWORD5_DUMMY_133MHZ GENMASK(21, 17) > > +#define PROFILE1_DWORD5_DUMMY_100MHZ GENMASK(11, 7) > > +#define PROFILE1_DUMMY_DEFAULT 20 > > + > > +/** > > + * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table > > + * @nor: pointer to a 'struct spi_nor' > > + * @profile1_header: pointer to the 'struct sfdp_parameter_header' describing > > + * the 4-Byte Address Instruction Table length and version. > > Profile 1.0 Table
Oops! Will fix.
> > + * @params: pointer to the 'struct spi_nor_flash_parameter' to be. > > + * > > + * Return: 0 on success, -errno otherwise. > > + */ ... > > + /* > > + * We don't know what speed the controller is running at. Find the > > + * dummy cycles for the fastest frequency the flash can run at to be > > + * sure we are never short of dummy cycles. A value of 0 means the > > + * frequency is not supported. > > + * > > + * Default to PROFILE1_DUMMY_DEFAULT if we don't find anything, and let > > + * flashes set the correct value if needed in their fixup hooks. > > + */ > > + dummy = FIELD_GET(PROFILE1_DWORD4_DUMMY_200MHZ, dwords[3]); > > + if (!dummy) > > + dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_166MHZ, dwords[4]); > > + if (!dummy) > > + dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_133MHZ, dwords[4]); > > + if (!dummy) > > + dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_100MHZ, dwords[4]); > > + if (!dummy) > > + dummy = PROFILE1_DUMMY_DEFAULT; > > just a dev_dbg here, without assuming what default value means
And we leave dummy to 0, correct?
-- Regards, Pratyush Yadav Texas Instruments India
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