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Subject[GIT PULL] clk fixes for v5.9-rc7
The following changes since commit d2249bf25c565b6e310453962fef63f8d38677a6:

clk: qcom: lpass: Correct goto target in lpass_core_sc7180_probe() (2020-09-10 13:42:35 -0700)

are available in the Git repository at: tags/clk-fixes-for-linus

for you to fetch changes up to b02cf0c4736c65c6667f396efaae6b5521e82abf:

clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clk (2020-09-22 12:54:41 -0700)

Another batch of clk driver fixes

- Make sure DRAM and ChipID region doesn't get disabled on Exynos
- Fix a SATA failure on Tegra
- Fix the emac_ptp clk divider on stratix10

Dinh Nguyen (1):
clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clk

Marek Szyprowski (2):
clk: samsung: Keep top BPLL mux on Exynos542x enabled
clk: samsung: exynos4: mark 'chipid' clock as CLK_IGNORE_UNUSED

Stephen Boyd (2):
Merge tag 'v5.9-clk-samsung-fixes' of into clk-fixes
Merge tag 'for-5.10-clk' of git:// into clk-fixes

Thierry Reding (3):
clk: tegra: Capitalization fixes
clk: tegra: Always program PLL_E when enabled
clk: tegra: Fix missing prototype for tegra210_clk_register_emc()

drivers/clk/samsung/clk-exynos4.c | 4 ++--
drivers/clk/samsung/clk-exynos5420.c | 5 +++++
drivers/clk/socfpga/clk-s10.c | 2 +-
drivers/clk/tegra/clk-pll.c | 7 ++-----
drivers/clk/tegra/clk-tegra210-emc.c | 2 ++
5 files changed, 12 insertions(+), 8 deletions(-)


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