Messages in this thread |  | | Date | Wed, 30 Sep 2020 15:41:41 +0930 | From | "Andrew Jeffery" <> | Subject | Re: [PATCH 0/4] Remove LPC register partitioning |
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On Mon, 28 Sep 2020, at 17:13, Ryan Chen wrote: > Hello Joel & Andrew, > Those patches are more organize for ASPEED SOC LPC register layout. > Does those patches have any feedback?
I support getting the problem fixed. However, the series also needs to fix the LPC devicetree binding at
Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
What's proposed isn't backwards compatible. We need to agree that a breaking change is the way we want to go and get Rob's buy-in. Given the impact of the change I'd prefer we don't try to maintain backwards compatibility. All known users of the binding ship the dtb with the kernel.
Can we get a v2 with the binding documentation fixed? That will probably need some review.
Andrew
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