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SubjectRe: [PATCH v3 7/7] clk: qcom: Add display clock controller driver for SM8250
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Quoting Jonathan Marek (2020-09-23 09:10:04)
> On 9/22/20 3:00 PM, Stephen Boyd wrote:
> > Quoting Jonathan Marek (2020-09-11 08:34:07)
> >> diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c
> >> new file mode 100644
> >> index 000000000000..7c0f384a3a42
> >> --- /dev/null
> >> +++ b/drivers/clk/qcom/dispcc-sm8250.c
> >> @@ -0,0 +1,1100 @@
> >> +// SPDX-License-Identifier: GPL-2.0
> >> +/*
> >> + * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
> >> + */
> >> +
> > [...]
> >> +
> >> +static const struct clk_parent_data disp_cc_parent_data_6[] = {
> >> + { .fw_name = "bi_tcxo" },
> >> + { .fw_name = "dsi0_phy_pll_out_dsiclk" },
> >> + { .fw_name = "dsi1_phy_pll_out_dsiclk" },
> >
> > Can we remove clk postfix on these clk names?
> >
>
> This is consistent with the names used in both sdm845 and sc7180
> drivers. If this should change then those should be changed too?

If DT isn't using it already then it sounds OK to change the other
SoCs. Otherwise fix it just for this one.

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