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SubjectRe: [PATCH v7 2/2] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
On Thu, Sep 10, 2020 at 12:31:02PM +0800, Hector Yuan wrote:
> From: "Hector.Yuan" <hector.yuan@mediatek.com>
>
> Add devicetree bindings for MediaTek HW driver.
>
> Signed-off-by: Hector.Yuan <hector.yuan@mediatek.com>
> ---
> .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 141 ++++++++++++++++++++
> 1 file changed, 141 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
>
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> new file mode 100644
> index 0000000..118a163
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> @@ -0,0 +1,141 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek's CPUFREQ Bindings
> +
> +maintainers:
> + - Hector Yuan <hector.yuan@mediatek.com>
> +
> +description:
> + CPUFREQ HW is a hardware engine used by MediaTek
> + SoCs to manage frequency in hardware. It is capable of controlling frequency
> + for multiple clusters.
> +
> +properties:
> + compatible:
> + const: "mediatek,cpufreq-hw"

Needs to be SoC specific. This stuff is never constant from one SoC to
the next. 'cpufreq' is a Linuxism. What's the block called in the
datasheet? Use that.

Don't need quotes either.

> +
> + reg:
> + minItems: 1
> + maxItems: 2
> + description: |
> + Addresses and sizes for the memory of the HW bases in each frequency domain.
> +
> + reg-names:
> + items:
> + - const: "freq-domain0"
> + - const: "freq-domain1"

Kind of pointless to have names based on the index. Drop 'reg-names'.

> + description: |
> + Frequency domain name. i.e.
> + "freq-domain0", "freq-domain1".
> +
> + "#freq-domain-cells":
> + const: 1
> + description: |
> + Number of cells in a freqency domain specifier.

You don't need this. It's not a common binding that's going to vary.

> +
> + mtk-freq-domain:
> + maxItems: 1
> + description: |
> + Define this cpu belongs to which frequency domain. i.e.
> + cpu0-3 belong to frequency domain0,
> + cpu4-6 belong to frequency domain1.

This property doesn't go in the 'mediatek,cpufreq-hw' node. You would
need a separate schema. However, I think the easiest thing to do here is
something like this:

mediatek,freq-domain-0 = <&cpu0>, <&cpu1>;

Or you could just re-use the OPP binding with just 0 entries:

opp-table-0 {
compatible = "mediatek,hw-operating-points", "operating-points-v2";
};
opp-table-1 {
compatible = "mediatek,hw-operating-points", "operating-points-v2";
};

> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - "#freq-domain-cells"
> +
> +examples:
> + - |
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + enable-method = "psci";
> + mtk-freq-domain = <&cpufreq_hw 0>;
> + reg = <0x000>;
> + };
> +
> + cpu1: cpu@1 {

Unit address is wrong.

> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + enable-method = "psci";
> + mtk-freq-domain = <&cpufreq_hw 0>;
> + reg = <0x100>;
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + enable-method = "psci";
> + mtk-freq-domain = <&cpufreq_hw 0>;
> + reg = <0x200>;
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + enable-method = "psci";
> + mtk-freq-domain = <&cpufreq_hw 0>;
> + reg = <0x300>;
> + };
> +
> + cpu4: cpu@4 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + enable-method = "psci";
> + mtk-freq-domain = <&cpufreq_hw 1>;
> + reg = <0x400>;
> + };
> +
> + cpu5: cpu@5 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + enable-method = "psci";
> + mtk-freq-domain = <&cpufreq_hw 1>;
> + reg = <0x500>;
> + };
> +
> + cpu6: cpu@6 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a75";
> + enable-method = "psci";
> + mtk-freq-domain = <&cpufreq_hw 1>;
> + reg = <0x600>;
> + };
> +
> + cpu7: cpu@7 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a75";
> + enable-method = "psci";
> + mtk-freq-domain = <&cpufreq_hw 1>;
> + reg = <0x700>;
> + };
> + };
> +
> + /* ... */
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpufreq_hw: cpufreq@11bc00 {
> + compatible = "mediatek,cpufreq-hw";
> + reg = <0 0x11bc10 0 0x8c>,
> + <0 0x11bca0 0 0x8c>;
> + reg-names = "freq-domain0", "freq-domain1";
> + #freq-domain-cells = <1>;
> + };
> + };
> +
> +
> +
> +
> --
> 1.7.9.5

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