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Subject[PATCH 0/3 v4] x86: AMD: Don't flush cache if hardware enforces cache coherency across encryption domains
Date
v3 -> v4:
1. Patch# 1 from v3 has been dropped.
2. The CPUID feature for hardware-enforced cache coherency has been
renamed.

[PATCH 1/3 v4] x86: AMD: Add hardware-enforced cache coherency as a
[PATCH 2/3 v4] x86: AMD: Don't flush cache if hardware enforces cache
[PATCH 3/3 v4] KVM: SVM: Don't flush cache if hardware enforces cache

arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/cpu/scattered.c | 1 +
arch/x86/kvm/svm/sev.c | 3 ++-
arch/x86/mm/pat/set_memory.c | 2 +-
4 files changed, 5 insertions(+), 2 deletions(-)

Krish Sadhukhan (3):
x86: AMD: Add hardware-enforced cache coherency as a CPUID feature
x86: AMD: Don't flush cache if hardware enforces cache coherency across encryption domnains
KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption domains

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