Messages in this thread | | | Subject | Re: [PATCH v3 10/16] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts | From | Marek Szyprowski <> | Date | Mon, 14 Sep 2020 21:13:00 +0200 |
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Hi Marc,
On 14.09.2020 18:10, Marc Zyngier wrote: > On 2020-09-14 15:32, Marek Szyprowski wrote: >> On 01.09.2020 16:43, Marc Zyngier wrote: >>> In order to switch the bcm2836 driver to privide standard interrupts >>> for IPIs, it first needs to stop lying about the way things work. >>> >>> The mailbox interrupt is actually a multiplexer, with enough >>> bits to store 32 pending interrupts per CPU. So let's turn it >>> into a chained irqchip. >>> >>> Once this is done, we can instanciate the corresponding IPIs, >>> and pass them to the architecture code. >>> >>> Signed-off-by: Marc Zyngier <maz@kernel.org> >> >> This one also fails. It breaks booting of Raspberry Pi 3b boards (both >> in ARM and ARM64 mode): > > Damn. This used to work. Looks like I was eager to delete stuff at > some point. Can you give this a go and let me know if that works > for you (only tested in QEMU with the raspi2 model): > > diff --git a/drivers/irqchip/irq-bcm2836.c > b/drivers/irqchip/irq-bcm2836.c > index 85df6ddad9be..97838eb705f9 100644 > --- a/drivers/irqchip/irq-bcm2836.c > +++ b/drivers/irqchip/irq-bcm2836.c > @@ -193,6 +193,8 @@ static void > bcm2836_arm_irqchip_ipi_send_mask(struct irq_data *d, > > static struct irq_chip bcm2836_arm_irqchip_ipi = { > .name = "IPI", > + .irq_mask = bcm2836_arm_irqchip_dummy_op, > + .irq_unmask = bcm2836_arm_irqchip_dummy_op, > .irq_eoi = bcm2836_arm_irqchip_ipi_eoi, > .ipi_send_mask = bcm2836_arm_irqchip_ipi_send_mask, > }; > > > Thanks again,
This fixes boot on my RPi3b. Thanks!
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland
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